Avalanche photodiode sensor and distance measuring device

ABSTRACT

Distance measurement accuracy is improved. An avalanche photodiode sensor according to an embodiment includes a first semiconductor substrate and a second semiconductor substrate bonded to a first surface of the first semiconductor substrate, wherein the first semiconductor substrate includes a plurality of photoelectric conversion portions arranged in a matrix and an element separation portion, the plurality of photoelectric conversion portions include a first photoelectric conversion portion, the element separation portion has a first element separation region and a second element separation region, the first photoelectric conversion portion is arranged between the first element separation region and the second element separation region, the first semiconductor substrate further includes a plurality of concave-convex portions on a second surface opposite to the first surface and between the first element separation region and the second element separation region, and the second semiconductor substrate includes a reading circuit connected to each of the photoelectric conversion portions.

TECHNICAL FIELD

The present disclosure relates to an avalanche photodiode sensor and adistance measuring device.

BACKGROUND ART

A distance measuring image sensor that measures a distance using atime-of-flight (ToF) technique has attracted attention in recent years.For example, a pixel array formed by arranging a plurality of singlephoton avalanche diode (SPAR) pixels in a plane using a complementarymetal oxide semiconductor (CMOS) semiconductor integrated circuittechnology can be used for the distance measuring image sensor. In aSPAD pixel, avalanche amplification occurs if a photon enters its PNjunction region of a high electric field while a voltage much higherthan a breakdown voltage is being applied. Detecting the time when acurrent flows momentarily here enables distance measurement with highaccuracy.

CITATION LIST Patent Literature

-   [PTL 1] JP 2018-88488 A-   [PTL 2] JP 2017-108062 A-   [PTL 3] WO 2018/074530

SUMMARY Technical Problem

The distance to an object is calculated based on light reflected by theobject when the distance to the object is measured using the distancemeasuring image sensor as described above. Thus, when the amount ofreflected light is small, such as that from a distant object, thereflected light may be buried in ambient light (also called disturbancelight) and the distance measurement accuracy may decrease.

Therefore, the present disclosure proposes an avalanche photodiodesensor and a distance measuring device capable of improving the distancemeasuring precision.

Solution to Problem

In order to solve the above problems, an avalanche photodiode sensoraccording to the present disclosure includes a first semiconductorsubstrate and a second semiconductor substrate bonded to a first surfaceof the first semiconductor substrate, wherein the first semiconductorsubstrate includes a plurality of photoelectric conversion portionsarranged in a matrix and an element separation portion forelement-separating the plurality of photoelectric conversion portionsfrom each other, the plurality of photoelectric conversion portionsinclude a first photoelectric conversion portion, the element separationportion has a first element separation region and a second elementseparation region, the first photoelectric conversion portion isarranged between the first element separation region and the secondelement separation region, the first semiconductor substrate furtherincludes a plurality of concave-convex portions arranged on a secondsurface opposite to the first surface and arranged between the firstelement separation region and the second element separation region, andthe second semiconductor substrate includes a reading circuit connectedto each of the photoelectric conversion portions.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a block diagram showing an exemplary schematic configurationof a ToF sensor which is a distance measuring device according to afirst embodiment.

FIG. 2 is a diagram for explaining an optical system of the ToF sensoraccording to the first embodiment.

FIG. 3 is a block diagram showing an exemplary schematic configurationof a light receiving portion according to the first embodiment.

FIG. 4 is a schematic diagram showing an exemplary schematicconfiguration of an effective region in a SPAD array according to thefirst embodiment.

FIG. 5 is a circuit diagram showing an exemplary schematic configurationof a SPAD pixel according to the first embodiment.

FIG. 6 is a block diagram showing an example of a more detailedconfiguration of a SPAD addition unit according to the first embodiment.

FIG. 7 is a diagram showing an exemplary chip configuration of the lightreceiving portion according to the first embodiment.

FIG. 8 is a cross-sectional view showing an exemplary cross-sectionalstructure of a first chip according to the first embodiment.

FIG. 9 is a cross-sectional view showing a cross-sectional structure ofplane A-A in FIG. 8.

FIG. 10 is a diagram for explaining an example of a moth-eye structureaccording to the first embodiment.

FIG. 11 is a diagram for explaining another example of the moth-eyestructure according to the first embodiment.

FIG. 12 is a cross-sectional view showing an exemplary cross-sectionalstructure of a first chip according to a first modification of the firstembodiment.

FIG. 13 is a cross-sectional view showing a cross-sectional structure ofplane B-B in FIG. 12.

FIG. 14 is a cross-sectional view showing an exemplary cross-sectionalstructure of a first chip according to a second modification of thefirst embodiment.

FIG. 15 is a cross-sectional view showing a cross-sectional structure ofplane C-C in FIG. 14.

FIG. 16 is a cross-sectional view showing an exemplary cross-sectionalstructure of a first chip according to a third modification of the firstembodiment.

FIG. 17 is a cross-sectional view showing an exemplary cross-sectionalstructure of a first chip according to a fourth modification of thefirst embodiment.

FIG. 18 is a cross-sectional view showing an exemplary cross-sectionalstructure of a first chip according to a fifth modification of the firstembodiment.

FIG. 19 is a cross-sectional view showing an exemplary cross-sectionalstructure of a first chip according to a second embodiment.

FIG. 20 is a cross-sectional view showing a cross-sectional structure ofplane G-G in FIG. 19.

FIG. 21 is a cross-sectional view showing an exemplary cross-sectionalstructure of a first chip according to a first modification of thesecond embodiment.

FIG. 22 is a cross-sectional view showing a cross-sectional structure ofplane H-H in FIG. 21.

FIG. 23 is a cross-sectional view showing an exemplary cross-sectionalstructure of a first chip according to a second modification of thesecond embodiment.

FIG. 24 is a cross-sectional view showing a cross-sectional structure ofplane J-J in FIG. 23.

FIG. 25 is a cross-sectional view showing an exemplary cross-sectionalstructure of a first chip according to a third modification of thesecond embodiment.

FIG. 26 is a cross-sectional view showing an exemplary cross-sectionalstructure of a first chip according to a fourth modification of thesecond embodiment.

FIG. 27 is a cross-sectional view showing an exemplary cross-sectionalstructure of a first chip according to a fifth modification of thesecond embodiment.

FIG. 28 is a block diagram showing an exemplary schematic configurationof a vehicle control system.

FIG. 29 is an explanatory diagram showing an example of the installationpositions of vehicle exterior information detection units and imagingunits.

DESCRIPTION OF EMBODIMENTS

Hereinafter, one embodiment of the present disclosure will be describedin detail with reference to the drawings. In the following embodiments,the same parts are denoted by the same reference numerals and thusduplicate description will be omitted.

The present disclosure will be described in the order of items shownbelow.

1. First Embodiment

1.1 Distance measuring device (ToF sensor)

1.2 Optical system

1.3 Light receiving portion

1.4 SPAD array

1.5 SPAD pixel

1.6 Exemplary schematic operation of SPAD pixel

1.7 SPAD addition unit

1.8 Sampling period

1.9 Exemplary chip configuration

1.10 Exemplary cross-sectional structure

1.11 Moth-eye structure

1.12 Operation and advantages

1.13 Modifications

1.13.1 First modification

1.13.2 Second modification

1.13.3 Third modification

1.13.4 Fourth modification

1.13.5 Fifth modification

2. Second Embodiment

2.1 Exemplary cross-sectional structure

2.2 Operation and advantages

2.3 Modifications

2.3.1 First modification

2.3.2 Second modification

2.3.3 Third modification

2.3.4 Fourth modification

2.3.5 Fifth modification

3. Application examples

1. First Embodiment

First, a first embodiment will be described in detail below withreference to the drawings.

1.1 Distance Measuring Device (ToF Sensor)

FIG. 1 is a block diagram showing an exemplary schematic configurationof a ToF sensor which is a distance measuring device according to thefirst embodiment. As shown in FIG. 1, the ToF sensor 1 includes acontroller 11, a light emitting portion 13, a light receiving portion14, a calculation unit 15, and an external interface (I/F)

The controller 11 is composed, for example, of an information processingdevice such as a central processing unit (CPU) and controls eachcomponent of the ToF sensor 1.

The external I/F 19 may be, for example, a communication adapter forestablishing communication with an external host 80 via a communicationnetwork compliant with any standard such as a wireless local areanetwork (LAN), a wired LAN, a controller area network (CAN), a localinterconnect network (LIN), or FlexRay (registered trademark).

Here, for example, when the ToF sensor 1 is mounted on an automobile orthe like, the host 80 may be an engine control unit (ECU) mounted in theautomobile or the like. When the ToF sensor 1 is mounted on anautonomous mobile body such as an autonomous mobile robot such as adomestic pet robot, a robot vacuum cleaner, an unmanned aerial vehicle,or a following transport robot, the host 80 may be a control device orthe like that controls the autonomous mobile body.

The light emitting portion 13 includes, for example, one or a pluralityof semiconductor laser diodes as a light source and emits laser light L1in the form of a pulse having a predetermined time width with apredetermined period (also called a light emitting period). The lightemitting portion 13 emits, for example, laser light L1 having a timewidth of 10 nanoseconds (ns) with a period of 100 megahertz (MHz). Thelaser light L1 emitted from the light emitting portion 13 is reflectedby an object 90, for example, when the object 90 is within a distancemeasuring range, and the reflected light L2 is incident on the lightreceiving portion 14.

The light receiving portion 14 is an avalanche photodiode sensor, thedetails of which will be described later, and for example, includes aplurality of SPAD pixels arranged in a matrix and outputs information(for example, corresponding to the number of detection signals whichwill be described later) regarding the number of SPAD pixels which haveeach detected the incidence of a photon after the light emission of thelight emitting portion 13 (hereinafter referred to as the number ofdetections). For example, the light receiving portion 14 detects theincidence of photons with a predetermined sampling period in response toone light emission of the light emitting portion 13 and outputs thenumber of detections.

The calculation unit 15 counts the number of detections output from thelight receiving portion 14 for each plurality of SPAD pixels (forexample, corresponding to one or a plurality of macro pixels which willbe described later) and creates a histogram with the horizontal axisbeing the flight time and the vertical axis being a cumulative pixelvalue, based on a pixel value obtained by the counting. For example, thecalculation unit 15 repeatedly executes the counting of the number ofdetections and the calculation of a pixel value at a predeterminedsampling frequency in response to one light emission of the lightemitting portion 13 for each of a plurality of light emissions of thelight emitting portion 13, thereby creating a histogram in which thehorizontal axis (histogram bin) is the sampling period corresponding tothe flight time and the vertical axis is a cumulative pixel valueobtained by accumulating the pixel value obtained in each samplingperiod.

Further, the calculation unit 15 applies a predetermined filteringprocess to the created histogram and then identifies a flight time atwhich the cumulative pixel value peaks from the filtered histogram.Then, the calculation unit 15 calculates the distance from the ToFsensor 1 or a device on which the ToF sensor 1 is mounted to the object90 present in the distance measuring range based on the identifiedflight time. The distance information calculated by the calculation unit15 may be output, for example, to the host 80 or the like via theexternal I/F 19.

1.2 Optical System

FIG. 2 is a diagram for explaining an optical system of the ToF sensoraccording to the first embodiment. FIG. 2 illustrates a so-calledscan-type optical system that scans the angle of view of the lightreceiving portion 14 in the horizontal direction. However, the opticalsystem of the ToF sensor is not limited to this and may be, for example,that of a so-called flash-type ToF sensor in which the angle of view ofthe light receiving portion 14 is fixed.

As shown in FIG. 2, the optical system of the ToF sensor 1 includes alight source 131, a collimator lens 132, a half mirror 133, agalvanometer mirror 135, a light receiving lens 146, and a SPAD array141. The light source 131, the collimator lens 132, the half mirror 133,and the galvanometer mirror 135 are included, for example, in the lightemitting portion 13 in FIG. 1. The light receiving lens 146 and the SPADarray 141 are included, for example, in the light receiving portion 14in FIG. 1.

In the configuration shown in FIG. 2, laser light L1 emitted from thelight source 131 is converted into rectangular parallel light whosecross-sectional intensity spectrum is long in the vertical directionthrough the collimator lens 132 and is then incident on the half mirror133. The half mirror 133 reflects a part of the incident laser light L1.The laser light L1 reflected by the half mirror 133 is incident on thegalvanometer mirror 135. The galvanometer mirror 135 vibrates in thehorizontal direction with a predetermined rotation axis as the vibrationcenter, for example, by a drive unit 134 that operates under the controlof the controller 11. Thus, the laser light L1 is horizontally scannedsuch that the angle of view SR of the laser light L1 reflected by thegalvanometer mirror 135 reciprocates across the ranging range AR in thehorizontal direction. A micro-electro-mechanical system (MEMS), a micromotor, or the like can be used for the drive unit 134.

The laser light L1 reflected by the galvanometer mirror 135 is reflectedby the object 90 present in the ranging range AR and the reflected lightL2 is incident on the galvanometer mirror 135. A part of the reflectedlight L2 incident on the galvanometer mirror 135 is transmitted throughthe half mirror 133 and incident on the light receiving lens 146,whereby an image is formed on a specific region (hereinafter referred toas an effective region) 142 in the SPAD array 141. The effective region142 may be the whole or a part of the SPAD array 141.

1.3 Light Receiving Portion

FIG. 3 is a block diagram showing an exemplary schematic configurationof the light receiving portion according to the first embodiment. Asshown in FIG. 3, the light receiving portion 14 includes a SPAD array141, a timing control circuit 143, a drive circuit 144, and an outputcircuit 145. In the following description, the timing control circuit143, the drive circuit 144, and the output circuit 145 may be referredto as peripheral circuits.

The SPAD array 141 includes a plurality of SPAD pixels 20 arranged in amatrix. Pixel drive lines LD (extending in the vertical direction in thefigure) are connected to the columns of the plurality of SPAD pixels 20and output signal lines LS (extending in the horizontal direction in thefigure) are connected to the rows. One ends of the pixel drive lines LDare connected to output ends of the drive circuit 144 corresponding tothe columns and one ends of the output signal lines LS are connected toinput ends of the output circuit 145 corresponding to the rows.

In the present embodiment, the whole or a part of the SPAD array 141 isused to detect the reflected light L2. The effective region 142 in theSPAD array 141 may be a vertically long rectangle similar to an image ofthe reflected light L2 formed on the SPAD array 141 when the laser lightL1 is entirely reflected into the reflected light L2. However, theeffective region 142 in the SPAD array 141 is not limited to this andvarious modifications can be made such as a region larger or smallerthan the image of the reflected light L2 formed on the SPAD array 141.

The drive circuit 144 includes a shift register, an address decoder, andthe like and drives the SPAD pixels 20 of the SPAD array 141 all at thesame time, column by column, or the like. Thus, the drive circuit 144includes at least a circuit that applies a quench voltage V_QCH whichwill be described later to each SPAD pixel 20 in a selected column ofthe SPAD array 141 and a circuit that applies a selection controlvoltage V_SEL which will be described later to each SPAD pixel 20 in theselected column. Then, the drive circuit 144 selects SPAD pixels 20 usedto detect the incidence of photons column by column by applying theselection control voltage V_SEL to a pixel drive line LD correspondingto a column to be read.

Signals (referred to as detection signals) V_OUT output from the SPADpixels 20 in the column selected and scanned by the drive circuit 144are input to the output circuit 145 through the output signal lines LS.The output circuit 145 outputs the detection signals V_OUT input fromthe SPAD pixels 20 to a SPAD addition unit 40 provided for each macropixel which will be described later.

The timing control circuit 143 includes a timing generator thatgenerates various timing signals or the like and controls the drive andoutput circuits 144 and 145 based on the various timing signalsgenerated by the timing generator.

1.4 SPAD Array

FIG. 4 is a schematic diagram showing an exemplary schematicconfiguration of the effective region in the SPAD array according to thefirst embodiment. As shown in FIG. 4, the effective region 142 has, forexample, a configuration in which a plurality of SPAD pixels 20 arearranged in a matrix. The plurality of SPAD pixels 20 are grouped into aplurality of macro pixels 30, each composed of a predetermined number ofSPAD pixels 20 arranged in rows and/or columns. A region defined byconnecting outer edges of SPAD pixels 20 located on the outermostperiphery of each macro pixel 30 has a predetermined shape (for example,a rectangle).

The effective region 142 is composed, for example, of a plurality ofmacro pixels 30 arranged in the vertical direction (corresponding to thecolumn direction). In the present embodiment, the effective region 142is divided, for example, into a plurality of regions (hereinafterreferred to as SPAD regions) arranged in the vertical direction. In theexample shown in FIG. 4, the effective region 142 is divided into fourSPAD regions 142-1 to 142-4. The lowest located SPAD region 142-1corresponds, for example, to the lowest quarter region in the angle ofview SR of the effective region 142, the SPAD region 142-2 above itcorresponds, for example, to the second lowest quarter region in theangle of view SR, the SPAD region 142-3 above it corresponds, forexample, to the third lowest quarter region in the angle of view SR, andthe highest SPAD region 142-4 corresponds, for example, to the highestquarter region in the angle of view SR.

1.5 SPAD Pixel

FIG. 5 is a circuit diagram showing an exemplary schematic configurationof a SPAD pixel according to the first embodiment. As shown in FIG. 5,the SPAD pixel 20 includes a photoelectric conversion portion 21 whichis a light receiving element and a reading circuit 22 for detecting thata photon is incident on the photoelectric conversion portion 21.

The reading circuit 22 includes a quench resistor 23, a digitalconverter 25, an inverter 26, a buffer 27, and a selection transistor24. The quench resistor 23 is composed, for example, of an N-type metaloxide semiconductor field effect transistor (MOSFET) (hereinafterreferred to as an NMOS transistor), a drain thereof is connected to ananode of the photoelectric conversion portion 21, and a source thereofis grounded via the selection transistor 24. Further, a preset quenchvoltage V_QCH for allowing the NMOS transistor to act as a quenchresistor is applied to a gate of the NMOS transistor constituting thequench resistor 23 from the drive circuit 144 via a pixel drive line LD.

In the present embodiment, the photoelectric conversion portion 21 is aSPAD. The SPAD is an avalanche photodiode that operates in Geiger modewhen a reverse bias voltage equal to or higher than the breakdownvoltage is applied between an anode and a cathode thereof and can detectthe incidence of a photon. That is, the photoelectric conversion portion21 generates an avalanche current when a photon is incident while areverse bias voltage V_SPAD equal to or higher than the breakdownvoltage is being applied between the anode and cathode.

The digital converter 25 includes a resistor 251 and an NMOS transistor252. A drain of the NMOS transistor 252 is connected to a power supplyvoltage VDD via the resistor 251 and a source thereof is grounded. Thevoltage at a connection point N1 between the anode of the photoelectricconversion portion 21 and the quench resistor 23 is applied to a gate ofthe NMOS transistor 252.

The inverter 26 includes a P-type MOSFET (hereinafter referred to as aPMOS transistor) 261 and an NMOS transistor 262. A drain of the PMOStransistor 261 is connected to the power supply voltage VDD and a sourcethereof is connected to a drain of the NMOS transistor 262. The drain ofthe NMOS transistor 262 is connected to the source of the PMOStransistor 261 and a source thereof is grounded. The voltage at aconnection point N2 between the resistor 251 and the drain of the NMOStransistor 252 is applied to a gate of the PMOS transistor 261 and thegate of the NMOS transistor 262. An output of the inverter 26 is inputto the buffer 27.

The buffer 27 is a circuit for impedance conversion. When an outputsignal is input to the buffer 27 from the inverter 26, the buffer 27impedance-converts the input output signal and outputs the convertedsignal as a detection signal V_OUT.

The selection transistor 24 is, for example, an NMOS transistor, a drainthereof is connected to the source of the NMOS transistor constitutingthe quench resistor 23, and a source thereof is grounded. The selectiontransistor 24 is connected to the drive circuit 144. The selectiontransistor 24 changes from off to on when the selection control voltageV_SEL from the drive circuit 144 has been applied to a gate of theselection transistor 24 via the pixel drive line LD.

1.6 Exemplary Schematic Operation of SPAD Pixel

The reading circuit 22 illustrated in FIG. 5 operates, for example, asfollows. First, while the selection control voltage V_SEL is appliedfrom the drive circuit 144 to the selection transistor 24 such that theselection transistor 24 is on, a reverse bias voltage V_SPAD equal to orhigher than the breakdown voltage is applied to the photoelectricconversion portion 21. This permits operation of the photoelectricconversion portion 21.

On the other hand, while the selection control voltage V_SEL is notapplied from the drive circuit 144 to the selection transistor 24 suchthat the selection transistor 24 is off, the reverse bias voltage V_SPADis not applied to the photoelectric conversion portion 21, thusprohibiting operation of the photoelectric conversion portion 21.

If a photon is incident on the photoelectric conversion portion 21 whilethe selection transistor 24 is on, an avalanche current is generated inthe photoelectric conversion portion 21. Thus, an avalanche currentflows through the quench resistor 23 and the voltage at the connectionpoint N1 rises. When the voltage at the connection point N1 becomeshigher than the turn-on voltage of the NMOS transistor 252, the NMOStransistor 252 is turned on and the voltage at the connection point N2changes from the power supply voltage VDD to 0 V. Then, when the voltageat the connection point N2 has changed from the power supply voltage VDDto 0 V, the PMOS transistor 261 changes from off to on, the NMOStransistor 262 changes from on to off, and the voltage at a connectionpoint N3 changes from 0 V to the power supply voltage VDD. As a result,a high-level detection signal V_OUT is output from the buffer 27.

Thereafter, when the voltage at the connection point N1 continues torise, the voltage applied between the anode and cathode of thephotoelectric conversion portion 21 becomes smaller than the breakdownvoltage, whereby the avalanche current stops and the voltage at theconnection point N1 drops. Then, when the voltage at the connectionpoint N1 has become lower than the turn-on voltage of the NMOStransistor 452, the NMOS transistor 452 is turned off and the output ofthe detection signal V_OUT from the buffer 27 is stopped (becomes a lowlevel).

In this way, the reading circuit 22 outputs a high-level detectionsignal V_OUT during a duration from the time when a photon is incidenton the photoelectric conversion portion 21 and an avalanche current isgenerated such that the NMOS transistor 452 is turned on to the timewhen the avalanche current is stopped such that the NMOS transistor 452is turned off. The output detection signal V_OUT is input to the SPADaddition unit 40 for each macro pixel 30 via the output circuit 145.Thus, the same number of detection signals V_OUT as the number of SPADpixels 20 where the incidence of photons is detected among a pluralityof SPAD pixels 20 constituting one macro pixel 30 (the number ofdetections) are input to each SPAD addition unit 40.

1.7 SPAD Addition Unit

FIG. 6 is a block diagram showing an example of a more detailedconfiguration of the SPAD addition unit according to the firstembodiment. The SPAD addition unit 40 may be configured to be includedin the light receiving portion 14 or configured to be included in thecalculation unit 15.

As shown in FIG. 6, the SPAD addition unit 40 includes, for example, apulse shaping unit 41 and a received photon counting unit 42.

The pulse shaping unit 41 shapes the pulse waveform of detection signalsV_OUT input from the SPAD array 141 via the output circuit 145 into apulse waveform having a time width corresponding to the operating clockof the SPAD addition unit 40.

The received photon counting unit 42 counts detection signals V_OUTinput from the corresponding macro pixel 30 for each sampling period,thereby counting the number of SPAD pixels 20 where the incidence ofphotons is detected (the number of detections) for each sampling period,and outputs this count value as a pixel value of the macro pixel 30.

1.8 Sampling Period

Here, the sampling period is the interval at which the time from theemission of the laser light L1 by the light emitting portion 13 to thedetection of the incidence of a photon by the light receiving portion 14(flight time) is measured. A period shorter than the light emissionperiod of the light emitting portion 13 is set for this sampling period.For example, shortening the sampling period enables calculation of theflight time of a photon emitted from the light emitting portion 13 andreflected by the object 90 with a higher time resolution. This meansthat increasing the sampling frequency enables calculation of thedistance to the object 90 with a higher distance measuring resolution.

For example, letting t be the flight time from when the laser light L1is emitted by the light emitting portion 13, which is then reflected bythe object 90, to when the reflected light L2 is incident on the lightreceiving portion 14, the distance L to the object 90 can be calculatedby the following equation (1) since the speed of light C is constant(C≈300,000,000 meters/second (m/s).

L=C×t/2.  (1)

Therefore, when the sampling frequency is 1 GHz, the sampling period is1 nanosecond (ns). In this case, one sampling period corresponds to 15centimeters (cm). This indicates that the distance measuring resolutionis 15 cm when the sampling frequency is 1 GHz. Further, when thesampling frequency is doubled to 2 GHz, the sampling period is 0.5nanoseconds (ns), such that one sampling period corresponds to 7.5centimeters (cm). This indicates that the distance measuring resolutioncan be halved when the sampling frequency is doubled. Thus, increasingthe sampling frequency and shortening the sampling period enablescalculation of the distance to the object 90 with higher accuracy.

1.9 Exemplary Chip Configuration

FIG. 7 is a diagram showing an exemplary chip configuration of the lightreceiving portion according to the first embodiment. As shown in FIG. 7,the ToF sensor 1 has, for example, a structure of a bonded chip 50 inwhich a first chip 51 and a second chip 52 are vertically bondedtogether. The first chip 51 is, for example, a semiconductor chip inwhich the photoelectric conversion portions 21 of the SPAD pixels 20 arearranged in a matrix and the second chip 52 is, for example, asemiconductor chip in which the reading circuits 22 of the SPAD pixels20, the peripheral circuits, and the like are formed.

For example, so-called direct bonding in which bonding surfaces of thefirst and second chips 51 and 52 are flattened and the first and secondchips 51 and 52 are bonded together by intermolecular force can be usedto bond the first and second chips 51 and 52 together. However, thepresent disclosure is not limited to this, and for example, so-calledCu—Cu bonding in which electrode pads made of copper (Cu) formed on thebonding surfaces of the first and second chips 51 and 52 are bondedtogether, other bump bonding, or the like can be used.

The first and second chips 51 and 52 are electrically connected, forexample, via a connecting portion such as a through-silicon via (TSV)penetrating the semiconductor substrate. For example, a so-called twinTSV method in which two TSVs, a TSV provided on the first chip 51 and aTSV provided from the first chip 51 to the second chip 52, are connectedon outer surfaces of the chips, a so-called shared TSV method in whichthe first and second chips 51 and 52 are connected by a TSV penetratingfrom the first chip 51 to the second chip 52, or the like can be adoptedfor the connection using TSVs.

However, the first and second chips 51 and 52 are electrically connectedvia a Cu—Cu bonding portion or a bump bonding portion when Cu—Cu bondingor bump bonding is used to bond the first and second chips 51 and 52together.

The bonded chip 50 shown in FIG. 7 may include the calculation unit 15,the light emitting portion 13, the controller 11, and the like inaddition to the light receiving portion 14.

1.10 Exemplary Cross-Sectional Structure

FIG. 8 is a cross-sectional view showing an exemplary cross-sectionalstructure of the first chip according to the first embodiment. FIG. 9 isa cross-sectional view showing a cross-sectional structure of plane A-Ain FIG. 8. FIG. 8 shows an exemplary cross-sectional structure of aphotoelectric conversion portion 21 in one SPAD pixel 20. However, inreality, photoelectric conversion portions 21 having the cross-sectionalstructure illustrated in FIG. 8 are arranged on the first chip 51 in amatrix as shown in FIG. 9. In FIG. 8, a lower surface of the first chip51 is a light incident surface.

As shown in FIG. 8, the first chip 51 includes a semiconductor substrate150, a wiring layer 170, a flattening film 161, and an on-chip lens 162.

The semiconductor substrate 150 may be a semiconductor substrate made ofa semiconductor material or a compound semiconductor material such assilicon (Si), germanium (Ge), gallium arsenide (GaAs), indium galliumarsenide (InGaAs), gallium phosphide (GaP), or indium phosphide (InP).

A photoelectric conversion portion 21 including an N− type semiconductorregion 151, a P-type semiconductor region 153, a P+ type semiconductorregion 154, and a contact layer 156 is formed in the semiconductorsubstrate 150.

The N− type semiconductor region 151 is, for example, a well region andmay be a region containing a low concentration of donors. The N− typesemiconductor region 151 may be, for example, a rectangularparallelepiped region having a square or rectangular cross-sectionparallel to an inside surface of the semiconductor substrate 150.

The P-type semiconductor region 153 is, for example, a region containinga predetermined concentration of acceptors and may be a regionsurrounding at least side and bottom surfaces of the N− typesemiconductor region 151.

The N+ type semiconductor region 155 is, for example, a regioncontaining a high concentration of donors and is arranged on the outsidesurface of the semiconductor substrate 150. The P+ type semiconductorregion 154 is, for example, a region containing a higher concentrationof acceptors than the P-type semiconductor region 153 and is arrangednear the outside surface of the semiconductor substrate 150 such thatthe P+ type semiconductor region 154 contacts the N+ type semiconductorregion 155.

The P+ type semiconductor region 154 and the N+ type semiconductorregion 155 form a PN junction that generates an avalanche current. Thus,an electric charge generated by photoelectric conversion in the N− typesemiconductor region 151 is introduced into the P+ type semiconductorregion 154 and is then amplified (avalanche-amplified) due to arelatively large potential difference given between the P+ typesemiconductor region 154 and the N+ type semiconductor region 155.

The N+ type semiconductor region 155 also functions as a cathode of thephotoelectric conversion portion 21 and serves as a contact layer forextracting the generated avalanche current out of the semiconductorsubstrate 150. On the other hand, the contact layer 156 is formed in aregion of the P-type semiconductor region 153 which is on the outsidesurface of the semiconductor substrate 150 and separated from the N+type semiconductor region 155. The contact layer 156 is, for example, aP++ type region containing a high concentration of acceptors and alsofunctions as an anode of the photoelectric conversion portion 21. Forexample, when the outside surface of the semiconductor substrate 150 onwhich the contact layer 156 is formed is viewed in plain view (see, forexample, FIG. 9 which will be described later), the contact layer 156 isformed along inner and outer peripheries of an area surrounded by anelement separation portion 157 on the outside surface of thesemiconductor substrate 150. When viewed in the cross-sectionalstructure in which the element separation portion 157 is viewed as beingdivided into two left and right regions (which will be referred to aselement separation regions) 157A and 157B as shown in FIG. 8, thecontact layer 156 is formed in two regions in a region defined by thetwo left and right element separation regions 157A and 157B, the tworegions being on the outside surface side of the semiconductor substrate150 and close to the element separation regions 157A and 157B,respectively.

The N+ type semiconductor region 155 can also function as an anode ofthe photoelectric conversion portion 21. In this case, the contact layer156 functions as a cathode of the photoelectric conversion portion 21.

The photoelectric conversion portions 21 having the above configurationare defined by the element separation portions 157 as described above.For example, the element separation portions 157 are provided intrenches formed in a grid pattern when viewed from the outside or insidesurface side of the semiconductor substrate 150 as shown in FIGS. 8 and9.

Each element separation portion 157 includes, for example, insulatingfilms 159 covering inner side surfaces of a trench formed in thesemiconductor substrate 150 and a reflective film 158 embedded in thetrench with the insulating films 159 formed on the inner side surfaces.Here, it is not essential that the reflective film 158 is fully embeddedin the trench and a void may remain in a part of the trench.

The reflective film 158 is, for example, a film for reflecting lightincident on the element separation portion 157. For example, not only areflective material that reflects visible light, infrared light, or thelike such as tungsten (W), but also a high refractive index materialsuch as silicon (Si), germanium (Ge), gallium phosphide (GaP), aluminumoxide (Al₂O₃), cerium oxide (CeO₂), hafnium oxide (HfO₂), indium oxide(In₂O₃), tin oxide (SnO₂), niobium pentoxide (Nb₂O₅), magnesium oxide(MgO), tantalum pentoxide (Ta₂O₅), titanium pentoxide (Ti₃O₅), othertitanium oxide (such as TiO or TiO₂), tungsten oxide (WO₃), yttriumoxide (Y₂O₃), zinc oxide (ZnO), zirconia (ZrO₂), cerium fluoride (CeF₃),gadolinium fluoride (GdF₃), lanthanum fluoride (LaF₃), or neodymiumfluoride (NdF₃) can be used for the reflective film 158. The highrefractive index material may be a material having a higher refractiveindex than the substrate material of the semiconductor substrate 150.

The insulating films 159 are, for example, films for preventingelectrical contact between the semiconductor substrate 150 and thereflective film 158. For example, an insulating material such as siliconoxide (SiO₂) or silicon nitride (SiN) can be used for the insulatingfilms 159. However, the insulating films 159 may be omitted when aninsulating material is used for the reflective film 158.

By optically separating adjacent SPAD pixels 20 by the elementseparation portions 157 in this way, the leakage of light into adjacentSPAD pixels 20 can be reduced, such that color mixture between adjacentpixels can be limited.

FIG. 8 illustrates a so-called front full trench isolation (FFTI) typeelement separation portion 157 that penetrates from the outside surfaceto the inside surface of the semiconductor substrate 150. However, theconfiguration of the element separation portion 157 is not limited tothe FFTI type. For example, various modifications can be made such as aso-called deep trench isolation (DTI) type element separation portionpresent from the outside surface to the middle of the semiconductorsubstrate 150 or a so-called reverse deep trench isolation (RDTI) typeelement separation portion present from the inside surface to the middleof the semiconductor substrate 150.

Further, a plurality of regularly or randomly arranged concave-convexportions 181 are provided on the inside surface of the semiconductorsubstrate 150 over the entirety of each of the regions 180 defined bythe element separation portions 157, that is, over an effective lightincident surface of the semiconductor substrate 150 as shown in FIGS. 8and 9.

The individual concave-convex portions 181 may have various shapes suchas, for example, a polygonal prism such as a quadrangular prism, atriangular prism, or a hexagonal prism, a polygonal pyramid such as aquadrangular pyramid, a triangular pyramid, or a hexagonal pyramid, apolygonal frustum such as a quadrangular frustum, a triangular frustum,or a hexagonal frustum, a cone (including an elliptical cone), or atruncated cone. For example, the change in the refractive index alongthe traveling direction of light can be made more gradual by forming theshape such that the diameter decreases toward the tip. The shape alsoincludes a shape with a tip at an obtuse angle or a shape with a flattip (such as a truncated frustum or a truncated cone).

The inside of the concave-convex portion 181 may be filled with aninsulating film such as silicon oxide (SiO₂) or silicon nitride (SiN).The size of each concave-convex portion 181 can be variously modified aslong as it is a size that can reduce the reflectance of the insidesurface of the semiconductor substrate 150, such as several micrometers(μm) or several nanometers (nm).

By forming the inside surface of the semiconductor substrate 150 with amoth-eye structure including a plurality of concave-convex portions 181in this way, it is possible to reduce the reflectance on the insidesurface of the semiconductor substrate 150. Thereby, it is possible toincrease the efficiency of the incidence of light on the photoelectricconversion portion 21, and as a result, it is possible to increase thequantum efficiency of the photoelectric conversion portion 21.

Further, by combining the reflective film 158 in the element separationportion 157 and the moth-eye structure, light scattered or diffracted bythe moth-eye structure can be reflected by the reflective film 158.Thereby, it is possible to lengthen the flight distance of lightincident on the semiconductor substrate 150 within the photoelectricconversion portion 21, and as a result, it is possible to increase thequantum efficiency of the photoelectric conversion portion 21.

The on-chip lens 162 is provided on the inside surface of thesemiconductor substrate 150 via the flattening film 161 made of asilicon oxide film, a silicon nitride film, or the like. The flatteningfilm 161 may include a pinning layer or the like provided at a boundarywith the semiconductor substrate 151. An outside surface of the on-chiplens 162 is given, for example, a curvature that allows the incidentlight to be focused near the center of the photoelectric conversionportion

On the other hand, the wiring layer 170 described above is provided onthe outside surface side of the semiconductor substrate 150. The wiringlayer 170 includes an insulating film 171 such as a silicon oxide filmor a silicon nitride film. For example, a via wiring 172 in contact withthe N+ type semiconductor region 155 that also functions as the cathodeof the photoelectric conversion portion 21 and a via wiring 176 incontact with the contact layer 156 that also functions as the anode ofthe photoelectric conversion portion 21 are provided in the insulatingfilm 171.

Further, for example, an electrode pad 173 made of copper (Cu) incontact with the via wiring 172 and an electrode pad 177 made of copper(Cu) in contact with the via wiring 176 are provided on an outsidesurface of the insulating film 171 (a surface opposite to thesemiconductor substrate 150). These electrode pads 173 and 177 are usedas electrode pads when the first and second chips 51 and 52 are Cu—Cubonded. Thus, when the first and second chips 51 and 52 are electricallyand mechanically bonded in another bonding form, the electrode pads 173and 177 may be replaced with members used for the bonding.

Although detailed illustration of the second chip 52 is omitted, FIG. 8shows electrode pads 191 and 195 made of copper (Cu) used for Cu—Cubonding, a terminal 192 that applies an electric potential (for example,+3 volts (V)) to the cathode of the photoelectric conversion portion 21,and a terminal 196 that applies an electric potential (for example, −20volts (V)) to the anode.

For example, when +3 volts (V) is applied to the cathode (the N+ typesemiconductor region 155) of the photoelectric conversion portion 21 viathe terminal 192 and −20 V is applied to the anode (the contact layer156) via the terminal 196, theoretically, a reverse bias voltage V_SPADof 23 V is applied between the N+ type semiconductor region 155 and theP+ type semiconductor region 154. Since this reverse bias voltage V_SPADis a potential difference equal to or greater than the breakdown voltageof the N+ type semiconductor region 155 and the P+ type semiconductorregion 154, an electric charge generated by photoelectric conversionmoves due to an electric field formed in the N− type semiconductorregion 151 and is introduced into the P+ type semiconductor region 154,such that an avalanche current is generated in the PN junction regioncomposed of the N+ type semiconductor region 155 and the P+ typesemiconductor region 154. This avalanche current is input to the readingcircuit 22 via the terminal 192.

P and N types may be interchanged in the configuration described above.In this case, the N− type semiconductor region 151 is replaced with a P−type semiconductor region, the P-type semiconductor region 153 isreplaced with an N-type semiconductor region, the P+ type semiconductorregion 154 is replaced with an N+ type semiconductor region, and the N+type semiconductor region 155 is replaced with a P+ type semiconductorregion. Further, the contact layer 156 is replaced with an N++ typeregion.

1.11 Moth-Eye Structure

Here, the moth-eye structure will be described with reference to FIG.10. The moth-eye structure is a region in which fine concave-convexportions 181 are formed. However, the concavity and convexity changedepending on where a surface used as a reference (hereinafter referredto as a reference surface) is set.

The moth-eye structure is a region having a fine concave-convexstructure formed at the interface (the interface on the light receivingsurface side) of the P-type semiconductor region 153 above the N− typesemiconductor region 151 which is the charge storage region. Thisconcave-convex structure is formed on the N− type semiconductor region151, that is, on the light receiving surface side of the semiconductorsubstrate 150. Therefore, the reference surface can be a predeterminedsurface of the semiconductor substrate 150. This description willcontinue with reference to the case where a part of the semiconductorsubstrate 150 is used as a reference surface as an example.

FIG. 10 is an enlarged view of the vicinity of concave-convex portions181. The case where the flattening film 161 includes a pinning layer 163as its bottom layer (on the semiconductor substrate 150 side) and atransparent insulating film 164 above the pinning layer 163 will beillustrated in this description.

In the example shown in FIG. 10, it is assumed that boundary surfaces ofthe concave-convex portions 181 between the pinning layer 163 and thetransparent insulating film 164 are upper surfaces 181-1. Further,boundary surfaces between the pinning layer 163 and the semiconductorsubstrate 150 are lower surfaces 181-2.

Further, it is assumed that reference surface A is a surface at theposition where the upper surfaces 181-1 are formed and reference surfaceC is a surface at the position where the lower surfaces 181-2 areformed. It is assumed that reference surface B is a surface locatedbetween the reference surface A and the reference surface C, that is, asurface located between the upper surfaces 181-1 and the lower surfaces181-2

When the reference surface A is used as a reference, the shapes of theconcave-convex portions 181 are concave shapes with respect to thereference surface A. That is, when the reference surface A is used as areference, the lower surfaces 181-2 are located at a position recessedbelow the reference surface A (=upper surface 181-1) and theconcave-convex portions 181 are regions where fine concavities areformed. In other words, when the reference surface A is used as areference, a concavity is formed between an upper surface 181-1 and anupper surface 181-1 and thus the concave-convex portions 181 can be saidto be regions in which fine concavities are formed.

When the reference surface C is used as a reference, the shapes of theconcave-convex portions 181 are convex shapes with respect to thereference surface C. That is, when the reference surface C is used as areference, the upper surfaces 181-1 are located at a position protrudingabove the reference surface C (=lower surface 181-2) and theconcave-convex portions 181 are regions where fine convexities areformed. In other words, when the reference surface C is used as areference, a convexity is formed between a lower surface 181-2 and alower surface 181-2 and thus the concave-convex portions 181 can be saidto be regions in which fine convexities are formed.

When the reference surface B is used as a reference, the shapes of theconcave-convex portions 181 are concave and convex shapes with respectto the reference surface B. That is, when the reference surface B isused as a reference, the lower surfaces 181-2 are located at a positionrecessed below the reference surface B (=surface located midway betweenupper surfaces 181-1 and lower surfaces 181-2) and thus theconcave-convex portions 181 can be said to be regions where fineconcavities are formed.

Further, when the reference surface B is used as a reference, the uppersurfaces 181-1 are located at a position protruding above the referencesurface B and thus the concave-convex portions 181 can be said to beregions in which fine convexities are formed.

The moth-eye structure can be expressed as a region formed with fineconcavities, a region formed with fine convexities, or a region formedwith fine concavities and convexities depending on where the referencesurface is set in the cross-sectional view of the SPAD pixel 20 asdescribed above.

In the following description, the concave-convex portions 181 will bedescribed with reference to the case where the reference surface A, thatis, the upper surface 181-1, is used as a reference surface as anexample, and the description will continue assuming that theconcave-convex portions 181 are regions in which fine concavities areformed.

The pitch of concavities corresponding to the period of concavities inthe concave-convex portions 181 is set, for example, to 250 nm or more.

In the example shown in FIG. 10, the case where the concave-convexportions 181 have a shape combining the planes of the upper surface181-1 and the lower surface 181-2 is shown as an example, but theconcave-convex portions 181 to which the present technology is appliedalso include those having a shape as shown in FIG. 11.

Concave-convex portions 181 shown in FIG. 11 are formed in the shape oftriangles in a cross-sectional view. Even with such a shape, a referencesurface can be set and a concavity or a convexity can be defined withrespect to the reference surface.

Since the concave-convex portions 181 shown in FIG. 11 are formed in theshape of triangles in a cross-sectional view, a surface connectingvertices thereof is set as a reference surface as an example of thereference surface.

A surface including a line connecting vertices on the transparentinsulating film 164 side among the vertices of the triangles of theconcave-convex portions 181 in the cross-sectional view is defined asreference surface A. A surface including a line connecting vertices onthe bottom side, that is, vertices on the N− type semiconductor region151 side, among the vertices of the triangles of the concave-convexportions 181 is defined as reference surface C. A surface between thereference surface A and the reference surface C is defined as referencesurface B.

Even when a reference surface is set at the positions of vertices of thetriangles of the concave-convex portions 181 as described above, theshape of the concave-convex portions 181 can be expressed differentlydepending on where the reference surface is set, similar to the casedescribed with reference to FIG. 10.

That is, when the reference surface A is used as a reference, the shapesof the concave-convex portions 181 are shapes having triangular(valley-like) concavities facing downward from the reference surface A.That is, when the reference surface A is used as a reference, valleyregions are located below the reference surface A and the valley regionscorrespond to concavities and therefore the concave-convex portions 181are regions in which fine concavities are formed. In other words, whenthe reference surface A is used as a reference, a concavity is formedbetween the vertex of a triangle and the vertex of an adjacent triangleand thus the concave-convex portions 181 can be said to be regions inwhich fine concavities are formed.

When the reference surface C is used as a reference, the shapes of theconcave-convex portions 181 are shapes having triangular (peaked)convexities facing upward from the reference surface C. That is, whenthe reference surface C is used as a reference, peak regions are locatedabove the reference surface C and the peak regions correspond toconvexities and therefore the concave-convex portions 181 are regions inwhich fine convexities are formed. In other words, when the referencesurface C is used as a reference, a convexity is formed between thevertices of the base of a triangle and thus the concave-convex portions181 can be said to be regions in which fine heads are formed.

When the reference surface B is used as a reference, the shapes of theconcave-convex portions 181 are shapes having concavities andconvexities (valleys and peaks) with respect to the reference surface B.That is, when the reference surface B is used as a reference, theconcave-convex portions 181 can be said to be regions formed with fineconcavities and convexities because they have concavities formingvalleys below the reference surface B and convexities forming peaksabove the reference surface B.

Even when the shapes of the concave-convex portions 181 are zigzagshapes having peaks and valleys as shown in FIG. 11, the concave-convexportions 181 can be defined as regions that can be expressed as regionsformed with fine concavities, regions formed with fine convexities, orregions formed with fine concavities and convexities depending on wherethe reference surface is set in the cross-sectional view of the SPADpixel 20 as described above.

Further, for example, when the reference surface is the interfacebetween a layer above the transparent insulating film 164 in theflattening film 161 and the transparent insulating film 164 in theconcave-convex portions 181 shown in FIG. 10 or 11, the concave-convexportions 181 can be said to be regions formed with fine concavitiessince the shapes of the concave-convex portions 181 have recessedregions (valleys).

Further, when the reference surface is the boundary surface between theP-type semiconductor region 153 and the N− type semiconductor region151, the concave-convex portions 181 can be said to be regions formedwith fine convexities since the shapes of the concave-convex portions181 have protruding regions (peaks).

With a predetermined flat surface in the cross-sectional view of theSPAD pixel 20 used as a reference surface, the shapes of theconcave-convex portions 181 can also be expressed depending on whetherthey are formed in the shape of valleys or formed in the shape of peakswith respect to the reference surface as described above.

Further, a region between SPAD pixels 20, that is, a regioncorresponding to the element separation portions 157 can be formed as aflat region in which no concave-convex portions 181 are formed. In thiscase, a surface including this flat region may be used as a referencesurface.

When the surface including the flat region is used as a referencesurface, the concave-convex portions 181 can be said to be regions inwhich fine concavities are formed since the shapes of the concave-convexportions 181 can be said to be shapes having portions recessed below thereference surface, that is, having valley-like portions.

The concave-convex portions 181 are regions that can be expressed asregions formed with fine concavities, regions formed with fineconvexities, or regions formed with fine concavities and convexitiesdepending on where the reference surface is set in the cross-sectionalview of the SPAD pixel 20 as described above.

Further, the concave-convex portions 181 can be expressed as formingregions formed with fine concavities, forming regions formed with fineconvexities, or forming regions formed with fine concavities dependingon the method of forming the concave-convex portions 181.

For example, in the case where the concave-convex portions 181 shown inFIG. 10 are formed so as to have shapes with the upper surfaces 181-1formed larger than the lower surfaces 181-2, it can be said thatportions corresponding to concavities are formed by scraping thesubstrate (the semiconductor substrate 150) while portions correspondingto convexities are left.

When the amount of the substrate scraped exceeds 50%, the amount of thesubstrate (silicon) scraped is larger than the amount of the substrateleft such that concavities and convexities are formed with the area ofthe concavities larger than the area of the convexities. That is, inthis forming method, concavities and convexities are formed such thatconcavities are dominant and thus it can be expressed that theconcave-convex portions 181 are formed by providing a plurality ofconvexities.

Further, when the amount of the substrate scraped is 50% or less, theamount of the substrate (silicon) scraped is smaller than the amount ofthe substrate left such that concavities and convexities are formed withthe area of the concavities smaller than the area of the convexities.That is, in this forming method, concavities and convexities are formedsuch that convexities are dominant and thus it can be expressed that theconcave-convex portions 181 are formed by providing a plurality ofconcavities.

From these facts, it can be expressed that a plurality of convexitiesare provided when concavities are dominant and it can be expressed thata plurality of concavities are provided when the substrate is dominant,depending on the method of forming the concave-convex portions 181.

The concave-convex portions 181 are regions that can be expressed asregions formed with fine concavities, regions formed with fineconvexities, or regions formed with fine concavities and convexities inthe cross-sectional view of the SPAD pixel 20, depending on the methodof forming the concave-convex portions 181 as described above.

Although the following description will continue assuming that theconcave-convex portions 181 are regions formed with fine concavities,this expression also includes regions such as regions formed with fineconvexities or regions formed with fine concavities and convexities asdescribed above.

1.12 Operation and Advantages

By providing the above configuration according to the presentembodiment, it is possible to reduce the reflectance on the insidesurface of the semiconductor substrate 150. Thereby, it is possible toincrease the efficiency of the incidence of light on the photoelectricconversion portion 21, and as a result, it is possible to increase thequantum efficiency of the photoelectric conversion portion 21.

Further, by combining the reflective film 158 in the element separationportion 157 and the moth-eye structure, light scattered or diffracted bythe moth-eye structure can be reflected by the reflective film 158 suchthat it is possible to lengthen the flight distance, and as a result, itis possible to increase the quantum efficiency of the photoelectricconversion portion 21.

1.13 Modifications

The case where the entire effective light incident surface (region 180)on the inside surface of the semiconductor substrate 150 is providedwith the concave-convex portions 181 to form a moth-eye structure isillustrated in the first embodiment described above. However, the regionin which the concave-convex portions 181 are formed is not limited tothe entire effective light incident surface (region 180) on the insidesurface of the semiconductor substrate 150. Thus, modifications of theregion 180 in which the concave-convex portions 181 are formed will bedescribed below with reference to some examples.

1.13.1 First Modification

FIG. 12 is a cross-sectional view showing an exemplary cross-sectionalstructure of a first chip according to a first modification. FIG. 13 isa cross-sectional view showing a cross-sectional structure of plane B-Bin FIG. 12. Similar to FIG. 8, FIG. 12 shows an exemplarycross-sectional structure of a photoelectric conversion portion 21 inone SPAD pixel 20. However, in reality, photoelectric conversionportions 21 having the cross-sectional structure illustrated in FIG. 12are arranged on the first chip 51 in a matrix as shown in FIG. 13. InFIG. 12, a lower surface of the first chip 51 is a light incidentsurface.

As shown in FIGS. 12 and 13, a region 180B in which concave-convexportions 181 are formed may be a region located at a central portion ina region (hereinafter referred to as a pixel region) defined by theelement separation portion 157 on the inside surface of thesemiconductor substrate 150, for example, above the N+ typesemiconductor region 155 and the P+ type semiconductor region 154. Inother words, a region (flat portion) in which no concave-convex portions181 are formed may be present on the outer periphery of the pixelregion, for example, above the contact layer 156. “Above” in thisdescription may be that when upward is defined as the direction from theinside surface to the outside surface of the semiconductor substrate 150which is parallel to the substrate thickness direction of thesemiconductor substrate 150.

1.13.2 Second Modification

FIG. 14 is a cross-sectional view showing an exemplary cross-sectionalstructure of a first chip according to a second modification. FIG. 15 isa cross-sectional view showing a cross-sectional structure of plane C-Cin FIG. 14. Similar to FIG. 8, FIG. 14 shows an exemplarycross-sectional structure of a photoelectric conversion portion 21 inone SPAD pixel 20. However, in reality, photoelectric conversionportions 21 having the cross-sectional structure illustrated in FIG. 14are arranged on the first chip 51 in a matrix as shown in FIG. 15. InFIG. 14, a lower surface of the first chip 51 is a light incidentsurface.

As shown in FIGS. 14 and 15, a region 180C in which concave-convexportions 181 are formed may be a region located at an outer peripheralportion in the pixel region, for example, above the contact layer 156.In other words, a region (flat portion) in which no concave-convexportions 181 are formed may be present in the center of the pixelregion, for example, above the N+ type semiconductor region 155 and theP+ type semiconductor region 154.

1.13.3 Third Modification

FIG. 16 is a cross-sectional view showing an exemplary cross-sectionalstructure of a first chip according to a third modification. FIG. 16shows, for example, an exemplary cross-sectional structure of a planecorresponding to the plane A-A in the exemplary cross-sectionalstructure of the first chip 51 shown in FIG. 8.

As shown in FIG. 16, a region 180D in which concave-convex portions 181are formed may be a cross-shaped region that divides the pixel regioninto a 2×2 matrix. In other words, regions in which no concave-convexportions 181 are formed may be present at the four corners of the pixelregion.

1.13.4 Fourth Modification

FIG. 17 is a cross-sectional view showing an exemplary cross-sectionalstructure of a first chip according to a fourth modification. Similar toFIG. 16, FIG. 17 shows, for example, an exemplary cross-sectionalstructure of a plane corresponding to the plane A-A in the exemplarycross-sectional structure of the first chip 51 shown in FIG. 8.

As shown in FIG. 17, regions 180E in which concave-convex portions 181are formed may be the four corners of the pixel region. In other words,a region in which no concave-convex portions 181 are formed may bepresent in a cross-shaped region that divides the pixel region into a2×2 matrix.

1.13.5 Fifth Modification

FIG. 18 is a cross-sectional view showing an exemplary cross-sectionalstructure of a first chip according to a fifth modification. Similar toFIG. 16 or 17, FIG. 18 shows, for example, an exemplary cross-sectionalstructure of a plane corresponding to the plane A-A in the exemplarycross-sectional structure of the first chip 51 shown in FIG. 8.

As shown in FIG. 18, a region 180F in which concave-convex portions 181are formed may be a cross-shaped region located in the center of thepixel region, for example, above the regions of the N+ typesemiconductor region 155 and the P+ type semiconductor region 154.

As in the first to fifth modifications described above, theconcave-convex portions 181 according to the first embodiment do nothave to be formed in the entire pixel region and may be formed in atleast a part of the pixel region. The first embodiment and itsmodifications described above are merely examples and can be variouslymodified.

2. Second Embodiment

Next, a second embodiment will be described in detail below withreference to the drawings.

The case where the region for photoelectrical conversion, that is, theN− type semiconductor region 151, is a rectangular parallelepiped isillustrated in the first embodiment and its modifications describedabove. However, for example, the time taken until an electric chargegenerated in an area in the vicinity of the inside surface of thesemiconductor substrate 150, particularly in the vicinity of the elementseparation portion 157 in the pixel region, is introduced into the P+type semiconductor region 154 is long since the distance to the P+ typesemiconductor region 154 from that area is long. Therefore, temporaljitter occurs due to the difference in the time taken until an electriccharge generated on the outside surface side of the semiconductorsubstrate 150 or in the vicinity of the P+ type semiconductor region 154is introduced into the P+ type semiconductor region 154, such that thereis a possibility that the distance measuring precision decreases.

Thus, in the present embodiment, a solid-state imaging device and adistance measuring device capable of reducing temporal jitter andlimiting a decrease in the distance measuring precision will bedescribed with reference to examples. In the following description, thesame components as those of the above embodiment or its modificationswill be denoted by the same reference numerals and detailed descriptionthereof will be omitted.

The basic configurations and operations of the solid-state imagingdevice and the distance measuring device according to the presentembodiment may be the same as those of the above embodiment or itsmodifications. However, in the present embodiment, the cross-sectionalstructure of the photoelectric conversion portion 21 formed on the firstchip 51 is replaced with an exemplary cross-sectional structure thatwill be described later.

2.1 Exemplary Cross-Sectional Structure

FIG. 19 is a cross-sectional view showing an exemplary cross-sectionalstructure of a first chip according to the second embodiment. FIG. 20 isa cross-sectional view showing a cross-sectional structure of plane G-Gin FIG. 19. FIG. 19 shows an exemplary cross-sectional structure of aphotoelectric conversion portion 21 in one SPAD pixel 20. However, inreality, photoelectric conversion portions 21 having the cross-sectionalstructure illustrated in FIG. 19 are arranged on the first chip 51 in amatrix as shown in FIG. 20. In FIG. 19, a lower surface of the firstchip 51 is a light incident surface.

As shown in FIGS. 19 and 20, the first chip 51 according to the presentembodiment has a trench 202G in the outer periphery of the pixel regionon the inside surface of the semiconductor substrate 150, for example,in a region 280G located above the contact layer 156 in the samecross-sectional structure as that of the first chip 51 described withreference to FIGS. 12 and 13 in the first modification of the firstembodiment, such that the light incident surface 203G at that portion(that is, the bottom surface of the trench 202G) is configured toapproach the P+ type semiconductor region 154 (hereinafter referred toas “raised”).

Steps are provided in portions corresponding to the region 280G in theN− type semiconductor region 151 and the P-type semiconductor region 153to secure a region in which the trench 202G is arranged.

For example, a light transmitting film 201G for guiding light incidentthrough the flattening film 161 to the photoelectric conversion portion21 may be provided inside the trench 202G. For example, a material thattransmits visible light, infrared light, or the like, such as a siliconoxide film or a silicon nitride film, may be used for the lighttransmitting film 201G.

A plurality of regularly or randomly arranged concave-convex portions181 may be provided on the bottom surface (the light incident surface203G) of the trench 202G, similar to the region 180B located in thecenter of the pixel region on the inside surface of the semiconductorsubstrate 150, for example, above the N+ type semiconductor region 155and the P+ type semiconductor region 154.

2.2 Operation and Advantages

By providing the above configuration according to the presentembodiment, it is possible to reduce the difference in the movingdistance of an electric charge generated by photoelectric conversion,such that it is possible to reduce temporal jitter due to the differencein the time taken for an electric charge to be introduced into the P+type semiconductor region 154 and thus to limit a decrease in thedistance measuring precision.

Other configurations, operations and advantages may be the same as thoseof the above embodiment or its modifications and thus detaileddescription thereof will be omitted here.

2.3 Modifications

The case where the outer peripheral portion of the pixel region on theinside surface of the semiconductor substrate 150, for example, theregion above the contact layer 156, is raised and concave-convexportions 181 are provided in each of in the raised region 280G and thecenter of the pixel region, for example, the region 180B located abovethe N+ type semiconductor region 155 and the P+ type semiconductorregion 154, is illustrated in the second embodiment described above.However, the raised region and the region in which concave-convexportions 181 are formed are not limited to these. Thus, modifications ofthe region in which the trench is formed and the region in whichconcave-convex portions are formed will be described below withreference to some examples.

2.3.1 First Modification

FIG. 21 is a cross-sectional view showing an exemplary cross-sectionalstructure of a first chip according to a first modification. FIG. 22 isa cross-sectional view showing a cross-sectional structure of plane H-Hin FIG. 21. Similar to FIG. 8, FIG. 21 shows an exemplarycross-sectional structure of a photoelectric conversion portion 21 inone SPAD pixel 20. However, in reality, photoelectric conversionportions 21 having the cross-sectional structure illustrated in FIG. 21are arranged on the first chip 51 in a matrix as shown in FIG. 22. InFIG. 21, a lower surface of the first chip 51 is a light incidentsurface.

As shown in FIGS. 21 and 22, the first chip 51 according to the presentembodiment has a trench 202H in the center of the pixel region on theinside surface of the semiconductor substrate 150, for example, in aregion 280H located above the N+ type semiconductor region 155 and theP+ type semiconductor region 154 in the same cross-sectional structureas that of the first chip 51 described with reference to FIGS. 14 and 15in the second modification of the first embodiment, such that the lightincident surface 203H at that portion (that is, the bottom surface ofthe trench 202H) is configured (raised) to approach the P+ typesemiconductor region 154.

A recess is provided in portions corresponding to the region 280H in theN− type semiconductor region 151 and the P-type semiconductor region 153to secure a region in which the trench 202H is arranged.

For example, a light transmitting film 201H for guiding light incidentthrough the flattening film 161 to the photoelectric conversion portion21 may be provided inside the trench 202H, similar to the firstmodification. For example, a material that transmits visible light,infrared light, or the like, such as a silicon oxide film or a siliconnitride film, may be used for the light transmitting film 201H.

A plurality of regularly or randomly arranged concave-convex portions181 may be provided on the bottom surface (the light incident surface203H) of the trench 202H, similar to the region 180C located on theouter periphery of the pixel region on the inside surface of thesemiconductor substrate 150, for example, above the contact layer 156.

2.3.2 Second Modification

FIG. 23 is a cross-sectional view showing an exemplary cross-sectionalstructure of a first chip according to a second modification. FIG. 24 isa cross-sectional view showing a cross-sectional structure of plane J-Jin FIG. 23. Similar to FIG. 8, FIG. 23 shows an exemplarycross-sectional structure of a photoelectric conversion portion 21 inone SPAD pixel 20. However, in reality, photoelectric conversionportions 21 having the cross-sectional structure illustrated in FIG. 23are arranged on the first chip 51 in a matrix as shown in FIG. 24. InFIG. 23, a lower surface of the first chip 51 is a light incidentsurface.

The case where a plurality of regularly or randomly arrangedconcave-convex portions 181 are provided on both the region 180C locatedon the outer periphery of the pixel region on the inside surface of thesemiconductor substrate 150, for example, above the contact layer 156,and the region 280H located in the center thereof, for example, abovethe N+ type semiconductor region 155 and the P+ type semiconductorregion 154 is illustrated in the second modification described above.However, the present disclosure is not limited to such a configurationand can have a configuration in which no concave-convex portions 181 areformed in one of the region 180C and the region 280H, for example, asshown in FIGS. 23 and 24. The case where the concave-convex portions 181of the region 180C are omitted is illustrated in FIGS. 23 and 24.

2.3.3 Third Modification

FIG. 25 is a cross-sectional view showing an exemplary cross-sectionalstructure of a first chip according to a third modification. FIG. 25shows, for example, an exemplary cross-sectional structure of a planecorresponding to the plane G-G in the exemplary cross-sectionalstructure of the first chip 51 shown in FIG. 19.

As shown in FIG. 25, a raised region 280K may be a cross-shaped regionthat divides the pixel region into a 2×2 matrix. The concave-convexportions 181 may be formed in the raised region 280K or may be formed ina non-raised region (a region other than the region 280K in each pixelregion) or may be formed in all of these regions.

2.3.4 Fourth Modification

FIG. 26 is a cross-sectional view showing an exemplary cross-sectionalstructure of a first chip according to a fourth modification. Similar toFIG. 25, FIG. 26 shows, for example, an exemplary cross-sectionalstructure of a plane corresponding to the plane G-G in the exemplarycross-sectional structure of the first chip 51 shown in FIG. 19.

As shown in FIG. 26, raised regions 280L may be the four corners of thepixel region. The concave-convex portions 181 may be formed in each ofthe four raised regions 280L or may be formed in a non-raised region (aregion other than the region 280L in each pixel region) or may be formedin all of these regions.

2.3.5 Fifth Modification

FIG. 27 is a cross-sectional view showing an exemplary cross-sectionalstructure of a first chip according to a fifth modification. Similar toFIG. 25 or 26, FIG. 27 shows, for example, an exemplary cross-sectionalstructure of a plane corresponding to the plane G-G in the exemplarycross-sectional structure of the first chip 51 shown in FIG. 19.

As shown in FIG. 27, a raised region 280M may be a cross-shaped regionlocated in the center of the pixel region, for example, above the N+type semiconductor region 155 and the P+ type semiconductor region 154.The concave-convex portions 181 may be formed in the raised region 280Mor may be formed in a non-raised region (a region other than the region280M in each pixel region) or may be formed in all of these regions.

As in the first to fifth modifications described above, the raisedregion is not limited to the outer periphery of the pixel region, forexample, the vicinity of the region above the contact layer 156, and canbe variously modified. The second embodiment and its modificationsdescribed above are merely examples and can be variously modified.

3. Application Examples

The technology according to the present disclosure can be applied tovarious products. For example, the technology according to the presentdisclosure may be realized as a device mounted on a moving body of anytype such as an automobile, an electric vehicle, a hybrid electricvehicle, a motorcycle, a bicycle, a personal mobility, an airplane, adrone, a ship, a robot, a construction machine, or an agriculturalmachine (tractor).

FIG. 28 is a block diagram showing an exemplary schematic configurationof a vehicle control system 7000 which is an example of a mobile bodycontrol system to which the technology according to the presentdisclosure can be applied. The vehicle control system 7000 includes aplurality of electronic control units connected via a communicationnetwork 7010. In the example shown in FIG. 28, the vehicle controlsystem 7000 includes a drive system control unit 7100, a body systemcontrol unit 7200, a battery control unit 7300, a vehicle exteriorinformation detection unit 7400, a vehicle interior informationdetection unit 7500, and an integrated control unit 7600. Acommunication network 7010 connecting these control units may be avehicle-mounted communication network compliant with any standard suchas a controller area network (CAN), a local interconnect network (LIN),a local area network (LAN), or FlexRay (registered trademark).

Each control unit includes a microcomputer that performs arithmeticprocessing according to various programs, a storage unit that storesprograms executed by the microcomputer or parameters used for variouscalculations, and a drive circuit that drives various devices to becontrolled. Each control unit also includes a network I/F forcommunicating with other control units via the communication network7010 and a communication I/F for communicating with devices, sensors, orthe like inside or outside the vehicle through wired communication orwireless communication. In FIG. 28, a microcomputer 7610, ageneral-purpose communication I/F 7620, a dedicated communication I/F7630, a positioning unit 7640, a beacon receiving unit 7650, anin-vehicle device I/F 7660, an audio/image output unit 7670, avehicle-mounted network I/F 7680, and a storage unit 7690 are shown asfunctional components of the integrated control unit 7600. Other controlunits also include a microcomputer, a communication I/F, a storage unit,and the like.

The drive system control unit 7100 controls the operation of devicesrelating to the drive system of the vehicle according to variousprograms. For example, the drive system control unit 7100 functions as acontrol device for a driving force generation device for generating thedriving force of the vehicle such as an internal combustion engine or adrive motor, a driving force transmission mechanism for transmitting thedriving force to the wheels, a steering mechanism for adjusting thesteering angle of the vehicle, a braking device for generating thebraking force of the vehicle, or the like. The drive system control unit7100 may function as a control device for an antilock brake system(ABS), an electronic stability control (ESC), or the like.

A vehicle condition detector 7110 is connected to the drive systemcontrol unit 7100. The vehicle condition detector 7110 may include, forexample, at least one of a gyro sensor that detects the angular velocityof an axial rotational movement of the vehicle body, an accelerationsensor that detects the acceleration of the vehicle, and sensors fordetecting the amount of operation of an accelerator pedal, the amount ofoperation of a brake pedal, the steering angle of a steering wheel, theengine speed, and the rotational speed of the wheels. The drive systemcontrol unit 7100 performs arithmetic processing using signals inputfrom the vehicle condition detector 7110 to control the internalcombustion engine, the drive motor, an electric power steering device, abrake device, or the like.

The body system control unit 7200 controls the operation of variousdevices mounted in the vehicle body according to various programs. Forexample, the body system control unit 7200 functions as a control devicefor a keyless entry system, a smart key system, a power window device,or various lamps such as headlamps, back lamps, brake lamps, blinkers,or fog lamps. In this case, radio waves transmitted from a portabledevice that substitutes for the key or signals of various switches maybe input to the body system control unit 7200. The body system controlunit 7200 receives inputs of these radio waves or signals and controls adoor lock device, the power window device, the lamps, and the like ofthe vehicle.

The battery control unit 7300 controls a secondary battery 7310, whichis a power supply source of the drive motor, according to variousprograms. For example, information such as the battery temperature, thebattery output voltage, or the remaining capacity of the battery isinput to the battery control unit 7300 from a battery device includingthe secondary battery 7310. The battery control unit 7300 performsarithmetic processing using these signals and performs temperatureadjustment control of the secondary battery 7310 or control of a coolingdevice or the like provided in the battery device.

The vehicle exterior information detection unit 7400 detects informationoutside the vehicle in which the vehicle control system 7000 is mounted.For example, at least one of imaging units 7410 and vehicle exteriorinformation detectors 7420 is connected to the vehicle exteriorinformation detection unit 7400. The imaging units 7410 include at leastone of a time of flight (ToF) camera, a stereo camera, a monocularcamera, an infrared camera, and other cameras. The vehicle exteriorinformation detectors 7420 include, for example, at least one of anenvironmental sensor for detecting the current weather or weatherconditions or an ambient information detection sensor for detectingother vehicles, obstacles, pedestrians, or the like around the vehiclein which the vehicle control system 7000 is mounted.

The environmental sensor may be, for example, at least one of a raindropsensor that detects rainy weather, a fog sensor that detects fog, asunshine sensor that detects the degree of sunshine, and a snow sensorthat detects snowfall. The ambient information detection sensor may beat least one of an ultrasonic sensor, a radar device, and a ‘lightdetection and ranging, laser imaging detection and ranging (LIDAR)device. The imaging units 7410 and the vehicle exterior informationdetectors 7420 may be provided as independent sensors or devices or maybe provided as a device into which a plurality of sensors or devices areintegrated.

Here, FIG. 29 shows an example of the installation positions of theimaging units 7410 and the vehicle exterior information detectors 7420.Imaging units 7910, 7912, 7914, 7916, and 7918 are provided, forexample, at the positions of at least one of a front nose, side mirrors,a rear bumper, a back door, and an upper part of a windshield in theoccupant compartment of the vehicle 7900. The imaging unit 7910 providedon the front nose and the imaging unit 7918 provided on the upper partof the windshield in the occupant compartment mainly acquire images infront of the vehicle 7900. The imaging units 7912 and 7914 provided onthe side mirrors mainly acquire images on the sides of the vehicle 7900.The imaging unit 7916 provided on the rear bumper or the back doormainly acquires images behind the vehicle 7900. The imaging unit 7918provided on the upper part of the windshield in the occupant compartmentis mainly used to detect a preceding vehicle, a pedestrian, an obstacle,a traffic light, a traffic sign, a lane, or the like.

FIG. 29 also shows an example of the imaging ranges of the imaging units7910, 7912, 7914, and 7916. The imaging range a indicates the imagingrange of the imaging unit 7910 provided on the front nose, the imagingranges b and c indicate the imaging ranges of the imaging units 7912 and7914 provided on the side mirrors, respectively, and the imaging range dindicates the imaging range of the imaging unit 7916 provided on therear bumper or the back door. For example, an overhead view image of thevehicle 7900 as viewed from above can be obtained by superimposing imagedata captured by the imaging units 7910, 7912, 7914, and 7916.

The vehicle exterior information detectors 7920, 7922, 7924, 7926, 7928,and 7930 provided on the front, the rear, the sides, the corners, andthe upper part of the windshield in the occupant compartment of thevehicle 7900 may each be, for example, an ultrasonic sensor or a radardevice. The vehicle exterior information detectors 7920, 7926, and 7930provided on the front nose, the rear bumper, the back door, and theupper part of the windshield in the occupant compartment of the vehicle7900 may each be, for example, a LIDAR device. These vehicle exteriorinformation detectors 7920 to 7930 are mainly used to detect a precedingvehicle, a pedestrian, an obstacle, or the like.

The description will continue returning to FIG. 28. The vehicle exteriorinformation detection unit 7400 causes the imaging units 7410 to captureimages outside the vehicle and receives the captured image data. Thevehicle exterior information detection unit 7400 also receives detectioninformation from the connected vehicle exterior information detectors7420. When the vehicle exterior information detectors 7420 are each anultrasonic sensor, a radar device, or a LIDAR device, the vehicleexterior information detection unit 7400 transmits ultrasonic waves,electromagnetic waves, or the like and receives information of receivedreflected waves. The vehicle exterior information detection unit 7400may perform object detection processing or distance detection processingon a person, a vehicle, an obstacle, a sign, a character on a roadsurface, or the like based on the received information. The vehicleexterior information detection unit 7400 may perform environmentalrecognition processing for recognizing rainfall, fog, road surfaceconditions, or the like based on the received information. The vehicleexterior information detection unit 7400 may calculate the distance toan object outside the vehicle based on the received information.

Further, the vehicle exterior information detection unit 7400 mayperform image recognition processing or distance detection processingfor recognizing a person, a vehicle, an obstacle, a sign, a character ona road surface, or the like based on the received image data. Thevehicle exterior information detection unit 7400 may perform processingsuch as distortion correction or alignment on the received image dataand synthesize image data captured by different imaging units 7410 togenerate an overhead view image or a panoramic image. The vehicleexterior information detection unit 7400 may perform viewpointconversion processing using image data captured by different imagingunits 7410.

The vehicle interior information detection unit 7500 detects vehicleinterior information. For example, a driver state detector 7510 thatdetects the driver's state is connected to the vehicle interiorinformation detection unit 7500. The driver state detector 7510 mayinclude a camera that captures the driver, a biosensor that detects thedriver's biological information, a microphone that collects sound in theoccupant compartment, or the like. The biosensor is provided, forexample, on a seat surface or the steering wheel and detects biometricinformation of a passenger sitting in a seat or the driver holding thesteering wheel. The vehicle interior information detection unit 7500 maycalculate the degree of fatigue or concentration of the driver based ondetection information input from the driver state detector 7510 and maydetermine whether the driver is dozing or not. The vehicle interiorinformation detection unit 7500 may perform processing such as noisecanceling processing on the collected audio signal.

The integrated control unit 7600 controls the overall operation of thevehicle control system 7000 according to various programs. An input unit7800 is connected to the integrated control unit 7600. The input unit7800 is realized, for example, by a device on which an input operationcan be performed by a passenger such as a touch panel, a button, amicrophone, a switch, a lever, or the like. Data obtained by performingvoice recognition on audio input through the microphone may be input tothe integrated control unit 7600. The input unit 7800 may be, forexample, a remote control device using infrared rays or other radiowaves or an externally connected device such as a mobile phone or apersonal digital assistant (PDA) that supports an operation on thevehicle control system 7000. The input unit 7800 may be, for example, acamera, in which case the passenger can input information by gesture.Alternatively, data obtained by detecting the movement of a wearabledevice worn by the passenger may be input. Further, the input unit 7800may include, for example, an input control circuit that generates aninput signal based on information input by the passenger or the likeusing the input unit 7800 and outputs the input signal to the integratedcontrol unit 7600. By operating the input unit 7800, the passenger orthe like inputs various data to the vehicle control system 7000 andinstructs the vehicle control system 7000 to perform a processingoperation.

The storage unit 7690 may include a read only memory (ROM) for storingvarious programs executed by the microcomputer and a random accessmemory (RAM) for storing various parameters, calculation results, sensorvalues, and the like. The storage unit 7690 may be realized by amagnetic storage device such as a hard disk drive (HDD), a semiconductorstorage device, an optical storage device, a magneto-optical storagedevice, or the like.

The general-purpose communication I/F 7620 is a general-purposecommunication I/F that mediates communication with various devicespresent in the external environment 7750. The general-purposecommunication I/F 7620 may implement a cellular communication protocolsuch as global system of mobile communications (GSM) (registeredtrademark), WiMAX (registered trademark), long term evolution (LTE)(registered trademark), or LTE-advanced (LTE-A), or other wirelesscommunication protocols such as wireless LAN (also called Wi-Fi(registered trademark)) or Bluetooth (registered trademark). Thegeneral-purpose communication I/F 7620 may be connected with a device(for example, an application server or a control server) present on anexternal network (for example, the Internet, a cloud network, or abusiness-specific network), for example, via a base station or an accesspoint. The general-purpose communication I/F 7620 may also be connectedwith a terminal present in the vicinity of the vehicle (for example, aterminal of a driver, a pedestrian, or a store or a machine typecommunication (MTC) terminal), for example, using a peer to peer (P2P)technology.

The dedicated communication I/F 7630 is a communication I/F thatsupports a communication protocol designed for use in a vehicle. Thededicated communication I/F 7630 may implement, for example, a standardprotocol such as wireless access in vehicle environment (WAVE) which isa combination of the lower layer IEEE802.11p and the upper layerIEEE1609, dedicated short range communications (DSRC), or a cellularcommunication protocol. The dedicated communication I/F 7630 typicallyperforms V2X communication, which is a concept including one or more ofvehicle to vehicle communication, vehicle to infrastructurecommunication, vehicle to home communication, and vehicle to pedestriancommunication.

The positioning unit 7640 receives, for example, global navigationsatellite system (GNSS) signals from GNSS satellites (for example,global positioning system (GPS) signals from GPS satellites) andexecutes positioning to generate position information including thelatitude, longitude, and altitude of the vehicle. The positioning unit7640 may identify the current position by exchanging a signal with awireless access point or may acquire position information from aterminal such as a mobile phone, a PHS, or a smartphone having apositioning function.

For example, the beacon receiving unit 7650 receives radio waves orelectromagnetic waves transmitted from a radio station or the likeinstalled on a road and acquires information such as the currentposition, traffic jam, road closure, or required time. The function ofthe beacon receiving unit 7650 may be included in the dedicatedcommunication I/F 7630 described above.

The in-vehicle device I/F 7660 is a communication interface thatmediates the connection between the microcomputer 7610 and variousin-vehicle devices 7760 present in the vehicle. The in-vehicle deviceI/F 7660 may establish a wireless connection using a wirelesscommunication protocol such as wireless LAN, Bluetooth (registeredtrademark), near field communication (NFC), or wireless USB (WUSB). Thein-vehicle device I/F 7660 may also establish a wired connection such asuniversal serial bus (USB), high-definition multimedia interface (HDMI)(registered trademark), or mobile high-definition link (MHL) via aconnection terminal (and a cable if necessary) (not shown). Thein-vehicle devices 7760 may include, for example, at least one of amobile device or a wearable device owned by a passenger or aninformation device carried in or attached to a vehicle. The in-vehicledevices 7760 may also include a navigation device that searches for aroute to an arbitrary destination. The in-vehicle device I/F 7660exchanges control signals or data signals with these in-vehicle devices7760.

The vehicle-mounted network I/F 7680 is an interface that mediatescommunication between the microcomputer 7610 and the communicationnetwork 7010. The vehicle-mounted network I/F 7680 transmits andreceives signals or the like according to a predetermined protocolsupported by the communication network 7010.

The microcomputer 7610 of the integrated control unit 7600 controls thevehicle control system 7000 according to various programs based oninformation acquired via at least one of the general-purposecommunication I/F 7620, the dedicated communication I/F 7630, thepositioning unit 7640, the beacon receiving unit 7650, the in-vehicledevice I/F 7660, and the vehicle-mounted network I/F 7680. For example,the microcomputer 7610 may calculate a control target value for thedriving force generation device, the steering mechanism, or the brakingdevice based on the acquired information inside and outside the vehicleand output a control command to the drive system control unit 7100. Forexample, the microcomputer 7610 may perform cooperative control for thepurpose of realizing the functions of an advanced driver assistancesystem (ADAS) including vehicle collision avoidance or impactmitigation, following travel based on an inter-vehicle distance, vehiclespeed maintenance travel, vehicle collision warning, or vehicle lanedeviation warning. The microcomputer 7610 may also perform cooperativecontrol for the purpose of automated driving for the vehicle to travelautonomously without relying on the driver's operation or the like bycontrolling the driving force generation device, the steering mechanism,the braking device, or the like based on the acquired information aroundthe vehicle.

The microcomputer 7610 may generate three-dimensional distanceinformation between the vehicle and objects such as structures, people,or the like around the vehicle based on information acquired via atleast one of the general-purpose communication I/F 7620, the dedicatedcommunication I/F 7630, the positioning unit 7640, the beacon receivingunit 7650, the in-vehicle device I/F 7660, and the vehicle-mountednetwork I/F 7680 and create local map information including informationaround the current position of the vehicle. The microcomputer 7610 mayalso predict a danger such as a vehicle collision, a pedestrian or thelike approaching the vehicle, or entering a closed road based on theacquired information and generate a warning signal. The warning signalmay be, for example, a signal for generating a warning sound or turningon a warning lamp.

The audio/image output unit 7670 transmits an output signal which is atleast one of audio and an image to an output device capable of visuallyor audibly providing notification information to the passenger of thevehicle or the outside of the vehicle. In the example of FIG. 28, anaudio speaker 7710, a display unit 7720, and an instrument panel 7730are illustrated as output devices. The display unit 7720 may include,for example, at least one of an onboard display and a heads-up display.The display unit 7720 may have an augmented reality (AR) displayfunction. The output device may be devices other than these devices suchas headphones, a wearable device such as an eyeglass-type display wornby the passenger, or a projector or lamp. When the output device is adisplay device, the display device visually displays results obtained bythe microcomputer 7610 performing various processing or informationreceived from other control units in various formats such as text, animage, a table, or a graph. When the output device is an audio outputdevice, the audio output device converts an audio signal composed ofreproduced audio data, acoustic data, or the like into an analog signaland audibly outputs the analog signal.

In the example shown in FIG. 28, at least two control units connectedvia the communication network 7010 may be integrated into one controlunit. Alternatively, each control unit may be made of a plurality ofcontrol units. Further, the vehicle control system 7000 may include adifferent control unit (not shown). In the above description, some orall of the functions carried out by any of the control units may beincluded in another control unit. That is, predetermined arithmeticprocessing may be performed by any control unit as long as informationis transmitted and received via the communication network 7010.Similarly, a plurality of control units may transmit and receivedetection information to and from each other via the communicationnetwork 7010, while a sensor or a device connected to one of the controlunits is connected to another control unit.

A computer program for realizing each function of the ToF sensor 1according to the present embodiment described with reference to FIG. 1can be implemented in any control unit or the like. A computer-readablerecording medium in which such a computer program is stored can beprovided. The recording medium is, for example, a magnetic disk, anoptical disc, a magneto-optical disc, or a flash memory. The computerprogram may be distributed, for example, via a network without using arecording medium.

In the vehicle control system 7000 described above, the ToF sensor 1according to the present embodiment described with reference to FIG. 1can be applied to the integrated control unit 7600 in the exemplaryapplication shown in FIG. 28. For example, the controller 11, thecalculation unit 15, and the external I/F 19 of the ToF sensor 1correspond to the microcomputer 7610, the storage unit 7690, and thevehicle-mounted network I/F 7680 of the integrated control unit 7600.However, the present disclosure is not limited to this and the vehiclecontrol system 7000 may correspond to the host 80 in FIG. 1.

Further, at least one of the components of the ToF sensor 1 according tothe present embodiment described with reference to FIG. 1 may berealized in a module for the integrated control unit 7600 shown in FIG.28 (for example, an integrated circuit module made of one die).Alternatively, the ToF sensor 1 according to the present embodimentdescribed with reference to FIG. 1 may be realized by a plurality ofcontrol units in the vehicle control system 7000 shown in FIG. 28.

Although embodiments of the present disclosure have been describedabove, the technical scope of the present disclosure is not limited tothe above embodiments as they are and various changes can be madewithout departing from the gist of the present disclosure. Components indifferent embodiments and modifications may also be combined asappropriate.

Further, the advantages in each embodiment described in the presentspecification are merely examples and are not limited and otheradvantages can also be achieved.

The present technology can also take on the following configurations.

(1)

An avalanche photodiode sensor including:

a first semiconductor substrate; and

a second semiconductor substrate bonded to a first surface of the firstsemiconductor substrate,

wherein

the first semiconductor substrate includes:

a plurality of photoelectric conversion portions arranged in a matrix;and an element separation portion for element-separating the pluralityof photoelectric conversion portions from each other,

the plurality of photoelectric conversion portions include a firstphotoelectric conversion portion,

the element separation portion has a first element separation region anda second element separation region,

the first photoelectric conversion portion is arranged between the firstelement separation region and the second element separation region,

the first semiconductor substrate further includes a plurality ofconcave-convex portions arranged on a second surface opposite to thefirst surface and arranged between the first element separation regionand the second element separation region, and

the second semiconductor substrate includes a reading circuit connectedto each of the photoelectric conversion portions.

(2)

The avalanche photodiode sensor according to (1) above, wherein thefirst photoelectric conversion portion includes a cathode region of afirst conductive type provided on the first surface of the firstsemiconductor substrate and an anode region of a second conductive typeopposite to the first conductive type, the anode region being providedon the first surface.

(3)

The avalanche photodiode sensor according to (2) above, wherein theplurality of concave-convex portions are arranged in a regioncorresponding to at least the cathode region or the anode region in asubstrate thickness direction of the first semiconductor substrate.

(4)

The avalanche photodiode sensor according to any one of (1) to (3)above, wherein the first photoelectric conversion portion is anavalanche photodiode.

(5)

The avalanche photodiode sensor according to any one of (1) to (4)above, wherein each of the first and second element separation regionsincludes a reflective film or a high refractive index film.

(6)

The avalanche photodiode sensor according to any one of (1) to (5)above, wherein each of the first and second element separation regionspenetrates the first semiconductor substrate from the first surface tothe second surface.

(7)

The avalanche photodiode sensor according to any one of (1) to (6)above, wherein the plurality of concave-convex portions are arranged onthe second surface in an entire region defined by the first and secondelement separation regions.

(8)

The avalanche photodiode sensor according to (2) above, wherein theplurality of concave-convex portions are arranged on the second surfacein a region corresponding to the cathode region in a substrate thicknessdirection of the first semiconductor substrate.

(9)

The avalanche photodiode sensor according to (2) above, wherein theplurality of concave-convex portions are arranged on the second surfacein a region corresponding to the anode region in a substrate thicknessdirection of the first semiconductor substrate.

(10)

The avalanche photodiode sensor according to (2) above, wherein theelement separation portion further includes third and fourth elementseparation regions that define the first photoelectric conversionportion in a different direction from the first and second elementseparation regions, and

the plurality of concave-convex portions are arranged on the secondsurface in a cross-shaped region that divides a rectangular regiondefined by the first to fourth element separation regions into four.

(11)

The avalanche photodiode sensor according to (2) above, wherein theelement separation portion further includes third and fourth elementseparation regions that define the first photoelectric conversionportion in a different direction from the first and second elementseparation regions, and

the plurality of concave-convex portions are arranged on the secondsurface at each of four corners of a rectangular region defined by thefirst to fourth element separation regions.

(12)

The avalanche photodiode sensor according to (2) above, wherein theplurality of concave-convex portions are arranged on the second surfacein a cross-shaped region corresponding to the cathode region in asubstrate thickness direction of the first semiconductor substrate.

(13)

The avalanche photodiode sensor according to any one of (1) to (12)above, wherein a trench is provided on the second surface of the firstsemiconductor substrate in at least a part of a region defined by thefirst and second element separation regions.

(14)

The avalanche photodiode sensor according to (13) above, wherein theplurality of concave-convex portions are provided on a bottom surface ofthe trench.

(15)

The avalanche photodiode sensor according to (13) above, wherein thefirst semiconductor substrate further includes a plurality ofconcave-convex portions provided on a bottom surface of the trench.

(16)

The avalanche photodiode sensor according to any one of (13) to (15)above, wherein the first semiconductor substrate further includes alight transmitting film provided inside the trench.

(17)

A distance measuring device including:

a light emitting portion configured to emit light of a predeterminedwavelength; an avalanche photodiode sensor configured to generate apixel signal from received light; and

a calculation unit configured to calculate a distance to an object basedon the pixel signal generated by the avalanche photodiode sensor,

wherein

the avalanche photodiode sensor includes:

a first semiconductor substrate; and

a second semiconductor substrate bonded to a first surface of the firstsemiconductor substrate,

the first semiconductor substrate includes:

a plurality of photoelectric conversion portions arranged in a matrix;and

an element separation portion for element-separating the plurality ofphotoelectric conversion portions from each other,

the plurality of photoelectric conversion portions include a firstphotoelectric conversion portion,

the element separation portion has a first element separation region anda second element separation region,

the first photoelectric conversion portion is arranged between the firstelement separation region and the second element separation region,

the first semiconductor substrate further includes a plurality ofconcave-convex portions arranged on a second surface opposite to thefirst surface and arranged between the first element separation regionand the second element separation region, and

the second semiconductor substrate includes a reading circuit connectedto each of the photoelectric conversion portions.

REFERENCE SIGNS LIST

-   1 ToF sensor-   11 Controller-   13 Light emitting portion-   14 Light receiving portion-   15 Calculation unit-   19 External I/F-   20 SPAR pixel-   21 Photoelectric conversion portion-   22 Reading circuit-   23 Quench resistor-   24 Selection transistor-   25 Digital converter-   251 Resistor-   252 NMOS transistor-   26 Inverter-   261 PMOS transistor-   262 NMOS transistor-   27 Buffer-   30 Macro pixel-   40 SPAD addition unit-   41 Pulse shaping unit-   42 Received photon counting unit-   50 Bonded chip-   51 First chip-   52 Second chip-   80 Host-   90 Object-   131 Light source-   132 Collimator lens-   133 Half mirror-   134 Drive unit-   135 Galvanometer mirror-   141 SPAD array-   142 Effective region-   142-1 to 142-4 SPAD region-   143 Timing control circuit-   144 Drive circuit-   145 Output circuit-   146 Light receiving lens-   150 Semiconductor substrate-   151 N-type semiconductor region-   153 P-type semiconductor region-   154 P+ type semiconductor region-   155 N+ type semiconductor region-   156 Contact layer-   157 Element separation portion-   157A, 157B Element separation region-   158 Reflective film-   159 Insulating film-   161 Flattening film-   162 On-chip lens-   163 Pinning layer-   164 Transparent insulating film-   170 Wiring layer-   171 Insulating film-   172, 176 Via wiring-   173, 177, 191 and 195 Electrode pad-   180, 180B, 180C, 180D, 180E, 180F, 280G, 280H, 280K, 280L, 280M    Region-   181 Concave-convex portion-   192, 196 Terminal-   201G, 201H Light transmitting film-   202G, 202H Trench-   203G, 203H Incident surface-   AR Distance measuring range-   L1 Laser light-   L2 Reflected light-   LD Pixel drive line-   LS Output signal line-   SR Angle of view

What is claimed is:
 1. An avalanche photodiode sensor, comprising: afirst semiconductor substrate; and a second semiconductor substratebonded to a first surface of the first semiconductor substrate, whereinthe first semiconductor substrate includes: a plurality of photoelectricconversion portions arranged in a matrix; and an element separationportion for element-separating the plurality of photoelectric conversionportions from each other, the plurality of photoelectric conversionportions include a first photoelectric conversion portion, the elementseparation portion has a first element separation region and a secondelement separation region, the first photoelectric conversion portion isarranged between the first element separation region and the secondelement separation region, the first semiconductor substrate furtherincludes a plurality of concave-convex portions arranged on a secondsurface opposite to the first surface and arranged between the firstelement separation region and the second element separation region, andthe second semiconductor substrate includes a reading circuit connectedto each of the photoelectric conversion portions.
 2. The avalanchephotodiode sensor according to claim 1, wherein the first photoelectricconversion portion includes a cathode region of a first conductive typeprovided on the first surface of the first semiconductor substrate andan anode region of a second conductive type opposite to the firstconductive type, the anode region being provided on the first surface.3. The avalanche photodiode sensor according to claim 2, wherein theplurality of concave-convex portions are arranged in a regioncorresponding to at least the cathode region or the anode region in asubstrate thickness direction of the first semiconductor substrate. 4.The avalanche photodiode sensor according to claim 1, wherein the firstphotoelectric conversion portion is an avalanche photodiode.
 5. Theavalanche photodiode sensor according to claim 1, wherein each of thefirst and second element separation regions includes a reflective filmor a high refractive index film.
 6. The avalanche photodiode sensoraccording to claim 1, wherein each of the first and second elementseparation regions penetrates the first semiconductor substrate from thefirst surface to the second surface.
 7. The avalanche photodiode sensoraccording to claim 1, wherein the plurality of concave-convex portionsare arranged on the second surface in an entire region defined by thefirst and second element separation regions.
 8. The avalanche photodiodesensor according to claim 2, wherein the plurality of concave-convexportions are arranged on the second surface in a region corresponding tothe cathode region in a substrate thickness direction of the firstsemiconductor substrate.
 9. The avalanche photodiode sensor according toclaim 2, wherein the plurality of concave-convex portions are arrangedon the second surface in a region corresponding to the anode region in asubstrate thickness direction of the first semiconductor substrate. 10.The avalanche photodiode sensor according to claim 2, wherein theelement separation portion further includes third and fourth elementseparation regions that define the first photoelectric conversionportion in a different direction from the first and second elementseparation regions, and the plurality of concave-convex portions arearranged on the second surface in a cross-shaped region that divides arectangular region defined by the first to fourth element separationregions into four.
 11. The avalanche photodiode sensor according toclaim 2, wherein the element separation portion further includes thirdand fourth element separation regions that define the firstphotoelectric conversion portion in a different direction from the firstand second element separation regions, and the plurality ofconcave-convex portions are arranged on the second surface at each offour corners of a rectangular region defined by the first to fourthelement separation regions.
 12. The avalanche photodiode sensoraccording to claim 2, wherein the plurality of concave-convex portionsare arranged on the second surface in a cross-shaped regioncorresponding to the cathode region in a substrate thickness directionof the first semiconductor substrate.
 13. The avalanche photodiodesensor according to claim 1, wherein a trench is provided on the secondsurface of the first semiconductor substrate in at least a part of aregion defined by the first and second element separation regions. 14.The avalanche photodiode sensor according to claim 13, wherein theplurality of concave-convex portions are provided on a bottom surface ofthe trench.
 15. The avalanche photodiode sensor according to claim 13,wherein the first semiconductor substrate further includes a pluralityof concave-convex portions provided on a bottom surface of the trench.16. The avalanche photodiode sensor according to claim 13, wherein thefirst semiconductor substrate further includes a light transmitting filmprovided inside the trench.
 17. A distance measuring device, comprising:a light emitting portion configured to emit light of a predeterminedwavelength; an avalanche photodiode sensor configured to generate apixel signal from received light; and a calculation unit configured tocalculate a distance to an object based on the pixel signal generated bythe avalanche photodiode sensor, wherein the avalanche photodiode sensorincludes: a first semiconductor substrate; and a second semiconductorsubstrate bonded to a first surface of the first semiconductorsubstrate, the first semiconductor substrate includes: a plurality ofphotoelectric conversion portions arranged in a matrix; and an elementseparation portion for element-separating the plurality of photoelectricconversion portions from each other, the plurality of photoelectricconversion portions include a first photoelectric conversion portion,the element separation portion has a first element separation region anda second element separation region, the first photoelectric conversionportion is arranged between the first element separation region and thesecond element separation region, the first semiconductor substratefurther includes a plurality of concave-convex portions arranged on asecond surface opposite to the first surface and arranged between thefirst element separation region and the second element separationregion, and the second semiconductor substrate includes a readingcircuit connected to each of the photoelectric conversion portions.